This invention relates generally to semiconductor integrated circuits and more particularly, it relates to a protection system for integrated circuits to prevent inadvertent damage caused by over-voltage transients such as electrostatic discharge.
It is generally known that the magnitude of an electric voltage allowed to be applied to an integrated circuit package is rather limited since the physical size of the integrated circuit package is fairly small. When the integrated circuit package is not being used, for example, in storage or handling, the external leads or pins thereof are susceptible to the build-up of a static charge thereon. If the integrated circuit package happens to come in contact with a ground potential, the accumulated static charges will flow to ground. Such static discharge can be of a catastrophic nature with sufficient energy to cause damage or even destroy the semiconductor element or chip mounted within the integrated circuit package.
In order to protect the semiconductor chip in the integrated circuit package from being destroyed when such static discharges occur, there has been provided in the prior art a protection element such as a transistor element or a p-n junction applied with a reverse bias, which breaks down when the semiconductor chip encounters an unexpectedly high voltage.